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Article Dans Une Revue Microprocessors and Microsystems: Embedded Hardware Design Année : 2019

Lightweight instruction-level encryption for embedded processors using stream ciphers

Résumé

Over the last 30 years, a number of secure processor architectures have been proposed to protect software integrity and confidentiality during its distribution and execution. In such architectures, encryption (together with integrity checking) is used extensively, on any data leaving a defined secure boundary. In this paper, we show how encryption can be achieved at the instruction level using a stream cipher. Thus encryption is more lightweight and efficient, and is maintained deeper in the memory hierarchy than the natural off-chip boundaries considered in most research works. It requires the control flow graph to be used and modified as part of the off-line encryption process, but thanks to the LLVM framework, it can be integrated easily in a compiler pipeline, and be completely transparent to the programmer. We also describe hardware modifications needed to support this encryption method, the latter were added to a 32-bit MIPS soft core. The synthesis performed on a Altera Cyclone V FPGA shows that encryption requires 26% of extra logic, while slowing-down execution time by an average of 48% in the best setting. (C) 2018 Elsevier B.V. All rights reserved.
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Dates et versions

hal-02176879 , version 1 (08-07-2019)

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Citer

Thomas Hiscock, Olivier Savry, Louis Goubin. Lightweight instruction-level encryption for embedded processors using stream ciphers. Microprocessors and Microsystems: Embedded Hardware Design , 2019, 64, pp.43-52. ⟨10.1016/j.micpro.2018.10.001⟩. ⟨hal-02176879⟩
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